Harsh Singh is currently a M.A.Sc. student in the Department of Electrical and Computer Engineering at the University of Toronto, from where he also completed his bachelors degree in Computer Engineering in 2006.
His research interest lies in exploring custom hardware based line-rate (high speed) publish-subscribe event processing system designs. His hardware design background is complimented with an internship experience at AMD - Canada (ATI formerly) where he worked as an ASIC design engineer. Moreover, prior to commencing his graduate studies he had been working as a hardware engineer at Ontario Power Generation.